Academics

From AES to Post-Quantum & Lightweight Cryptography: Battles of Cryptographic Algorithms in Hardware

Published:2019-05-16 

Speaker: Prof. Kris GajECE Department, George Mason University

Time and Date: 15:00-16:00 pm, May 16 2019

Place: Room 530 of Scientific Building, Handan Campus,Fudan University

 

Abstract:

    Cryptographic contests have emerged as a commonly accepted way of developing cryptographic standards. This process was applied for the first time to symmetric-key block ciphers, during the Advanced Encryption Standard (AES) competition. A similar approach has been later extended to multiple other cryptographic transformations, during subsequent contests, such as NESSIE, CRYPTREC, eSTREAM, SHA-3, and CAESAR. Most recently, the new standardization efforts devoted to Post-Quantum Cryptography (PQC) and Lightweight Cryptography have been launched by American National Institute of Standards and Technology (NIST). Although security is commonly accepted to be the most important criterion for evaluating candidates in all cryptographic contests, it is rarely by itself sufficient to determine a winner. Performance in hardware, and in particularly in Field Programmable Gate Arrays (FPGAs), has played a major role in the final stages of the majority of past and current contests. In this talk, we will discuss the contributions made by our group to the efficient, fair, and comprehensive benchmarking of cryptographic algorithms in hardware and embedded systems. These contributions have included the use of universal Application Programming Interfaces (APIs), development packages, test vector generation tools, open-source VHDL/Verilog code, target use cases, FPGA option and target frequency optimization tools (such as ATHENa and Minerva), as well as comprehensive databases and various graphical representations of results. A new emerging approach is based on the use of High-Level Synthesis tools to efficiently convert a conventional C program into FPGA hardware. In this talk, we will summarize the constant evolution of methodologies and tools for benchmarking cryptographic hardware, major groups working in this area worldwide, and the influence of the obtained results on the final outcomes of all major cryptographic contests.

 

Biography:

Kris Gaj received the M.Sc. and Ph.D. degrees in Electrical Engineering from Warsaw University of Technology in Warsaw, Poland. He was a founder of Enigma, a Polish company that generates practical software and hardware cryptographic applications used by major Polish banks. At George Mason University, he does research and teaches courses in the area of cryptographic engineering and reconfigurable computing. His research projects center on new hardware architectures for secret key ciphers, hash functions, public key cryptosystems (including four major families of post-quantum cryptosystems), and codebreaking, as well as benchmarking of cryptographic hardware, high-level synthesis, and software/hardware codesign. He is the co-director of the Cryptographic Engineering Research Group. He has been a member of the Program Committees of CHES, CryptArchi, CT-RSA, DATE, DSD, FPT, LightSec, PQCrypto, Quo Vadis Cryptology, ReConFig, ReCoSoc, and SPACE; a General Co-chair of CHES 2008 in Washington D.C., a Program Co-chair of CHES 2009 in Lausanne, Switzerland, and a Program Co-chair of SHARCS 2012 in Washington D.C. He is an author of a book on breaking German Enigma cipher during World War II, and a co-author of the book on Cryptographic Engineering. In 2013, he was awarded two patents for new Montgomery Multiplication Architectures.

Copyrights 2017 © The School of Information Science and Technology, Fudan University