1. High-Performance Low-Power Data Communication IC Technologies

2. CMOS Biotechnologies

Speaker: Dr. Yong Liu (IBM T. J. Research Center)

Time and Date: 15:00-16:00, Jul. 11, 2013

Place: Room 369, Microelectronics Building, Zhangjiang Campus

 

 

Abstract

In the first part of the talk, my research at IBM T. J. Watson Research, compact low-power data communications integrated circuits in various integration levels (including chip-to-chip and on-chip channels) are presented. To improve chip-to-chip data bandwidth in advanced data computing and storage systems that need high-bandwidth data communications among different chips, silicon carrier technology (2.5D) and through-silicon-via (TSV) based 3D silicon integration technology are introduced. To achieve ultra-high bandwidth (tens of Tb/s) enabled by these 2.5D and 3D silicon packaging technologies, compact low-power I/O transceivers are needed. In addition, compact low-power on-chip signaling is also critical for chips with multi-core processors and large embedded memories. This talk discusses the design methodologies, optimizations and chip implementation examples of these on-chip, 2.5D and 3D I/O systems.

The second part of the talk discusses my CMOS biotechnology research work performed at Harvard University. A CMOS magnetic biological cell actuation system and a portable CMOS mini-NMR biomolecular sensing system will be presented. These two systems showcase the benefits of leveraging CMOS technologies in biological and medical tools.

 

 

Biography

Yong Liu received the B.S.E.E. and M.S.E.E degrees from Tsinghua University, China, in 2000 and 2003, respectively, and the Ph.D. degree in electrical engineering at Harvard University, Cambridge, MA in 2008. In 2007, he joined IBM T. J. Research Center, Yorktown Heights, NY, where he is now a Research Staff Member and working on low-power and high-speed I/O for wireline communications and 3D silicon integration as well as integrated circuits for biomedical applications and nanotechnology. He is co-recipient Best Paper of IEEE Journal of Solid-State Circuits (JSSC) in 2009 and Beatrice Winner Award for Editorial Excellence in IEEE Solid-State Circuits Conference (ISSCC) 2009. He has authored or coauthored more than 30 publications， including 7 ISSC papers (5 1st-authored papers), 2 book chapters, and is co-inventor in 6 issued patents and 10 filed patents.